Micro Computer Control Corp. MA51 (T) 8051 Relocatable Macro Assembler Version 1.14 07-JAN-93 LCD Sat Jan 08 19:40:42 2005 PAGE 1 OBJECT MODULE PLACED IN LCD.OBJ ASSEMBLER INVOKED BY: MA51 LCD.SRC LOC OBJ LINE SOURCE 2 ;This code is listed here for entertainment value only, it should 3 ;not be used for anything important. Do not use this for a saleable product. 4 ;Feel free to pass this on to others in it's entirety. along with this message. 5 ;No Guarantees implicit or otherwise are implied, your mileage may vary. 8 9 $RB(0) 10 $RB(1) =1 11 $NOMOD51 INCLUDE(87C752.pdf) =1 13 ;This code is listed here for entertainment value only, it should =1 14 ;not be used for anything important. Do not use this for a saleable product. =1 15 ;Feel free to pass this on to others in it's entirety. along with this message. =1 16 ;No Guarantees implicit or otherwise are implied, your mileage may vary. =1 19 =1 20 ; Philips/Signetics 87C752 Processor Descriptor File =1 21 $NOLIST =1 185 $INCLUDE(common.inc) =1 187 ;This code is listed here for entertainment value only, it should =1 188 ;not be used for anything important. Do not use this for a saleable product. =1 189 ;Feel free to pass this on to others in it's entirety. along with this message. =1 190 ;No Guarantees implicit or otherwise are implied, your mileage may vary. =1 193 =1 194 ; Memory Map =1 195 ; Location Code Data =1 196 ; 0000h iRAM Internal Bank 0 =1 197 ; 0000h iRAM R0 [Ihead] =1 198 ; 0001h iRAM R1 [Itail] =1 199 ; 0002h iRAM R2 [last temperature reading] =1 200 ; 0003h iRAM R3 [ROW] =1 201 ; 0004h iRAM R4 [COL] =1 202 ; 0005h iRAM R5 unused? =1 203 ; 0006h iRAM R6 [temporary] =1 204 ; 0007h iRAM R7 [temporary] =1 205 =1 206 ; 0008h iRAM Internal Bank 1 =1 207 ; 0008h iRAM R0 [ohead] =1 208 ; 0009h iRAM R1 [otail] =1 209 ; 000ah iRAM R2 [MYSW] =1 210 ; 000a.0 iRAM [MYSW.0] RAW =1 211 ; 000a.1 iRAM [MYSW.1] COLOR =1 212 ; 000a.2 iRAM [MYSW.2] BROADCAST =1 213 ; 000bh iRAM R3 [OLDCHAR] =1 214 ; 000ch iRAM R4 [OLDTEMP] =1 215 ; 000dh iRAM R5 IBUF[0] =1 216 ; 000eh iRAM R6 IBUF[1] =1 217 ; 000fh iRAM R7 IBUF[2] =1 218 =1 219 ; 0010h iRAM Internal Bank 2 =1 220 ; 0010h iRAM R0 IBUF[3] LCD Sat Jan 08 19:40:42 2005 PAGE 2 LOC OBJ LINE SOURCE =1 221 ; 0011h iRAM R1 IBUF[4] =1 222 ; 0012h iRAM R2 IBUF[5] =1 223 ; 0013h iRAM R3 IBUF[6] =1 224 ; 0014h iRAM R4 IBUF[7] =1 225 ; 0015h iRAM R5 IBUF[8] =1 226 ; 0016h iRAM R6 IBUF[9] =1 227 ; 0017h iRAM R7 OBUF[0] =1 228 =1 229 ; 0018h iRAM Internal Bank 3 =1 230 ; 0018h iRAM R0 OBUF[1] =1 231 ; 0019h iRAM R1 OBUF[2] =1 232 ; 001ah iRAM R2 OBUF[3] =1 233 ; 001bh iRAM R3 OBUF[4] =1 234 ; 001ch iRAM R4 OBUF[5] =1 235 ; 001dh iRAM R5 OBUF[6] =1 236 ; 001eh iRAM R6 OBUF[7] =1 237 ; 001fh iRAM R7 OBUF[8] =1 238 =1 239 ; 0020h iRAM Internal (Stack start) =1 240 ; 0080h RAM Internal P0 =1 241 ; 0081h RAM Internal SP =1 242 ; 0082h RAM Internal DPL =1 243 ; 0083h RAM Internal DPH =1 244 ; 0084h RAM Internal nothing =1 245 ; 0087h RAM Internal nothing =1 246 ; 0088h RAM Internal TCON =1 247 ; 0089h RAM Internal TMOD =1 248 ; 008ah RAM Internal TL0 =1 249 ; 008bh RAM Internal TL1 =1 250 ; 008ch RAM Internal TH0 =1 251 ; 008dh RAM Internal TH1 =1 252 ; 008eh RAM Internal nothing =1 253 ; 008fh RAM Internal nothing =1 254 ; 0090h RAM Internal P1 =1 255 ; 0091h RAM Internal nothing =1 256 ; 0097h RAM Internal nothing =1 257 ; 0098h RAM Internal SCON =1 258 ; 0099h RAM Internal SBUF =1 259 ; 009ah RAM Internal nothing =1 260 ; 009fh RAM Internal nothing =1 261 ; 00a0h RAM Internal P2 =1 262 ; 00a1h RAM Internal nothing =1 263 ; 00a7h RAM Internal nothing =1 264 ; 00a8h RAM Internal IEC =1 265 ; 00a9h RAM Internal nothing =1 266 ; 00afh RAM Internal nothing =1 267 ; 00b0h RAM Internal P3 =1 268 ; 00b1h RAM Internal nothing =1 269 ; 00b7h RAM Internal nothing =1 270 ; 00b8h RAM Internal IPC =1 271 ; 00b9h RAM Internal nothing =1 272 ; 00cfh RAM Internal nothing =1 273 ; 00d0h RAM Internal PSW =1 274 ; 00d1h RAM Internal nothing =1 275 ; 00dfh RAM Internal nothing =1 276 ; 00e0h RAM Internal ACC =1 277 ; 00e1h RAM Internal nothing =1 278 ; 00efh RAM Internal nothing =1 279 ; 00f0h RAM Internal B =1 280 ; 00f1h RAM Internal nothing =1 281 ; 00ffh RAM Internal nothing =1 282 =1 283 LCD Sat Jan 08 19:40:42 2005 PAGE 3 LOC OBJ LINE SOURCE =1 284 ;COLS EQU 40 =1 285 ;ROWS EQU 4 0010 =1 286 COLS EQU 16 0001 =1 287 ROWS EQU 1 =1 288 0003 =1 289 ROW EQU 03h 0004 =1 290 COL EQU 04h =1 291 000A =1 292 MYSW EQU 0Ah 000B =1 293 OLDCHAR EQU 0Bh 000C =1 294 OLDTEMP EQU 0Ch =1 295 0000 =1 296 RAW EQU 0 0001 =1 297 COLOR EQU 1 0002 =1 298 BROADCAST EQU 2 =1 299 0095 =1 300 SRD EQU P1.5 0097 =1 301 SWR EQU P1.7 0094 =1 302 CTS EQU P1.4 ; Goes low when OK to send or receive. =1 303 =1 304 ; The following BCASTs better match the alarms versions. 00FE =1 305 BCAST_ON EQU 254 ; Broadcast on char. 00FD =1 306 BCAST_OFF EQU 253 ; Broadcast off char. =1 307 =1 308 ; R5 used for getchar routine. =1 309 ; R6 =1 310 ; R7 are temporaries. 0005 =1 311 R05 EQU 05h 0006 =1 312 R06 EQU 06h 0007 =1 313 R07 EQU 07h =1 314 000D =1 315 IBUFSTART EQU 0Dh 0017 =1 316 IBUFEND EQU 17h ; Up to but not including. =1 317 0017 =1 318 OBUFSTART EQU 17h 0020 =1 319 OBUFEND EQU 20h ; Up to but not including. =1 320 =1 321 ; At 9600 baud, 104.166667 usec/bit. at 5.24288MHz 1 cycle = 2.28882usec. =1 322 ; number of cycles per bit is 104.166667 / 2.28882 in this case or, =1 323 ; 46 (45.51) cycles per bit. 002E =1 324 CPB EQU 46 ; Cycles per bit. =1 325 326 sleep MACRO W 327 MOV DPTR,#NOT((W-5)/6) ; 2 cycles 328 ACALL LONGWAIT ; 2 cycles 329 ENDM =1 330 331 332 ; Note: These timings may not be optimal, i.e. I might be wasting some time 333 ; but thats pretty low on my priorities for this code. 334 0001 335 DB4 EQU 1 0002 336 DB5 EQU 2 0004 337 DB6 EQU 4 0008 338 DB7 EQU 8 0010 339 RW EQU 16 0020 340 RS EQU 32 0000 341 ONE_LINE EQU 0 0008 342 TWO_LINE EQU DB7 0000 343 F5x7 EQU 0 0004 344 F5x10 EQU DB6 0002 345 CINC EQU DB5 0000 346 CDEC EQU 0 LCD Sat Jan 08 19:40:42 2005 PAGE 4 LOC OBJ LINE SOURCE 0001 347 SHIFT EQU DB4 0000 348 CURSOR EQU 0 349 1999 350 msec15 EQU 6553 0889 351 msec5 EQU 2185 06FF 352 msec4_1 EQU 1791 036A 353 msec2 EQU 874 002C 354 usec100 EQU 44 0011 355 usec40 EQU 17 356 357 oute MACRO X 358 MOV A,#X 359 ACALL DISPLAY 360 ENDM 361 362 out MACRO X 363 MOV A,#X 364 MOV P3,A 365 ORL A,B 366 MOV P3,A 367 ENDM 368 369 EXTRN CODE(PUTCHAR) 370 EXTRN CODE(HEXSTR) 371 372 373 CLIBC SEGMENT CODE 374 RSEG CLIBC 375 376 PUBLIC INITLCD 377 PUBLIC PUTLCD 378 PUBLIC LONGWAIT 379 380 381 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 382 ; INITLCD 383 ; Initialize the LCD display. 384 ; B contains either EN or EN2 for each display 385 ; 386 ; Use DPH:DPL to get timings of up to 15 msecs. 387 ; at 5.24288MHz 1 cycle = 2.28882usec. 388 ; 15 msec / 2.28882 usec = 65534 cycles 389 ; 5 msec / 2.28882 usec = 2185 cycles 390 ; 4.1 msec / 2.28882 usec = 1791 cycles 391 ; 2.0 msec / 2.28882 usec = 874 cycles 392 ; 100 usec / 2.28882 usec = 44 cycles 393 ; 40 usec / 2.28882 usec = 17 cycles 394 ; 395 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 396 397 ; These sequences are highly lcd specific 398 0000 399 INITLCD: 0000 C2AF 400 CLR EA ; Shut off interrups to avoid timing problems. MACRO CALL 401 +1 sleep msec15 ; Warning sleep trashes ACC MACRO CALL 404 +1 out (DB4 OR DB5) MACRO CALL 409 +1 sleep msec5 ; Warning sleep trashes ACC LCD Sat Jan 08 19:40:42 2005 PAGE 5 LOC OBJ LINE SOURCE MACRO CALL 412 +1 out (DB4 OR DB5) MACRO CALL 417 +1 sleep msec5 ; Warning sleep trashes ACC MACRO CALL 420 +1 out (DB4 OR DB5) MACRO CALL 425 +1 sleep msec5 ; Warning sleep trashes ACC 428 MACRO CALL 429 +1 oute DB5 MACRO CALL 432 +1 oute DB5 435 ; should this be F5x10? MACRO CALL 436 +1 oute (TWO_LINE OR F5x10) MACRO CALL 439 +1 oute 0 MACRO CALL 442 +1 oute (DB7 OR DB6 OR DB5 OR DB4) MACRO CALL 445 +1 oute 0 MACRO CALL 448 +1 oute DB4 MACRO CALL 451 +1 oute 0 MACRO CALL 454 +1 oute (DB6 OR CINC OR CURSOR) 0052 D2AF 457 SETB EA ; Turn interrupts back on. 0054 22 458 RET 459 460 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 461 ; DISPLAY 462 ; Writes raw byte in ACC 463 ; AND toggles enable in B register no translation is done. 464 ; R6 is used as loop counter for timing. 465 0055 466 DISPLAY: 0055 F5B0 467 MOV P3,A 0057 45F0 468 ORL A,B 0059 F5B0 469 MOV P3,A 470 471 ;sleep for 2 msec. 005B 7EDA 472 MOV R6,#(msec2/4) 005D DEFE 473 DJNZ R6,$ 005F 7EDA 474 MOV R6,#(msec2/4) LCD Sat Jan 08 19:40:42 2005 PAGE 6 LOC OBJ LINE SOURCE 0061 DEFE 475 DJNZ R6,$ 476 0063 65F0 477 XRL A,B 0065 F5B0 478 MOV P3,A 0067 22 479 RET 480 481 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 482 ; PUTLCD 483 ; Writes character in ACC to the LCD display, 484 ; Characters are sent out a nibble at a time with controls using the high 485 ; nibble. 486 ; Map of ACC is [ E2 E RS RW ] [ DB7 DB6 DB5 DB4 ] 487 ; Uses R6 for timings. 488 0068 489 PUTLCD: 0068 C082 490 PUSH DPL 006A C083 491 PUSH DPH 006C C0F0 492 PUSH B 006E F5F0 493 MOV B,A 494 0070 543F 495 ANL A,#LOW( NOT(EN OR EN2)) 496 497 ; RW bit is low (read). 0072 30E432 498 JNB ACC.4,NOT_SPECIAL 499 500 ; RW bit is high (write request) 0075 7444 501 MOV A,#'D' ; Use D= format for data output. 0077 1100 F 502 ACALL PUTCHAR 0079 743D 503 MOV A,#'=' ; Use D= format for data output. 007B 1100 F 504 ACALL PUTCHAR 505 007D E5F0 506 MOV A,B 007F 543F 507 ANL A,#LOW( NOT(EN OR EN2)) 007F 508 ORL A,#0f ; Bring data lines high for a read. 509 0081 F5B0 510 MOV P3,A 0083 45F0 511 ORL A,B ; Enable LCD 0085 F5B0 512 MOV P3,A 513 0087 E5B0 514 MOV A,P3 ; And read high nibble first 515 0089 C4 516 SWAP A 008A 54F0 517 ANL A,#0f0h ; move high nibble to correct spot and save 008C C0E0 518 PUSH ACC 519 008E E5F0 520 MOV A,B 0090 543F 521 ANL A,#LOW( NOT(EN OR EN2)) 0090 522 ORL A,#0f ; Bring data lines high for a read. 523 0092 F5B0 524 MOV P3,A 0094 45F0 525 ORL A,B ; Enable LCD 0096 F5B0 526 MOV P3,A 527 0098 E5B0 528 MOV A,P3 ; And read low nibble finally 009A 540F 529 ANL A,#0fh 009C D0F0 530 POP B 009E 25F0 531 ADD A,B ; Now ACC contains the byte data from display. 00A0 75B03F 532 MOV P3,#LOW( NOT(EN OR EN2)) 00A3 1100 F 533 ACALL HEXSTR 00A5 8007 534 SJMP RETPUTLCD ; Leave routine. 535 536 00A7 537 NOT_SPECIAL: LCD Sat Jan 08 19:40:42 2005 PAGE 7 LOC OBJ LINE SOURCE 00A7 F5B0 538 MOV P3,A 00A9 85F0B0 539 MOV P3,B 00AC F5B0 540 MOV P3,A 541 00AE 542 RETPUTLCD: 543 00AE D0F0 544 POP B 00B0 D083 545 POP DPH 00B2 D082 546 POP DPL 00B4 22 547 RET 548 549 ; Overhead is 2+2+1, loop time is 6 cycles 00B5 550 LONGWAIT: 00B5 A3 551 INC DPTR ; 2 cycle 00B6 E583 552 MOV A,DPH ; 1 cycle 00B8 4582 553 ORL A,DPL ; 1 cycle 00BA 70F9 554 JNZ LONGWAIT ; 2 cycles 00BC 22 555 RET ; 1 cycle 556 557 558 $EJECT LCD Sat Jan 08 19:40:42 2005 PAGE 8 LOC OBJ LINE SOURCE 559 END LCD Sat Jan 08 19:40:42 2005 PAGE 9 SYMBOL TABLE LISTING ------ ----- ------- N A M E T Y P E V A L U E A T T R I B U T E S AADR0...... NUMB 0001H A AADR1...... NUMB 0002H A AADR2...... NUMB 0004H A AC......... B ADDR 00D0H.6 A ACC........ D ADDR 00E0H A ADAT....... D ADDR 0084H A ADCI....... NUMB 0010H A ADCON...... D ADDR 00A0H A ADCS....... NUMB 0008H A ARL........ B ADDR 0098H.4 A ATN........ B ADDR 0098H.6 A B.......... D ADDR 00F0H A BCAST_OFF.. NUMB 00FDH A BCAST_ON... NUMB 00FEH A BROADCAST.. NUMB 0002H A CARL....... B ADDR 0098H.4 A CDEC....... NUMB 0000H A CDR........ B ADDR 0098H.5 A CINC....... NUMB 0002H A CLIBC...... C SEG 00BDH R REL = UNIT CLRTI...... B ADDR 00D8H.5 A COL........ NUMB 0004H A COLOR...... NUMB 0001H A COLS....... NUMB 0010H A CPB........ NUMB 002EH A CSTP....... B ADDR 0098H.2 A CSTR....... B ADDR 0098H.3 A CT0........ B ADDR 00D8H.0 A CT1........ B ADDR 00D8H.1 A CTS........ B ADDR 0090H.4 A CURSOR..... NUMB 0000H A CXA........ B ADDR 0098H.7 A CY......... B ADDR 00D0H.7 A DB4........ NUMB 0001H A DB5........ NUMB 0002H A DB6........ NUMB 0004H A DB7........ NUMB 0008H A DISPLAY.... C ADDR 0055H R SEG = CLIBC DPH........ D ADDR 0083H A DPL........ D ADDR 0082H A DRDY....... B ADDR 0098H.5 A EA......... B ADDR 00A8H.7 A EI2........ B ADDR 00A8H.4 A EN......... NUMB 0040H A EN2........ NUMB 0080H A ENADC...... NUMB 0020H A EPWM....... B ADDR 00A8H.3 A ET0........ B ADDR 00A8H.1 A EX0........ B ADDR 00A8H.0 A EX1........ B ADDR 00A8H.2 A F0......... B ADDR 00D0H.5 A F5X10...... NUMB 0004H A F5X7....... NUMB 0000H A GATE....... B ADDR 0088H.7 A HEXSTR..... C ADDR ---- EXT I2CFG...... D ADDR 00D8H A I2CON...... D ADDR 0098H A I2DAT...... D ADDR 0099H A I2STA...... D ADDR 00F8H A IBUFEND.... NUMB 0017H A IBUFSTART.. NUMB 000DH A IDLE....... B ADDR 0098H.6 A IDLES...... B ADDR 00F8H.6 A IE......... D ADDR 00A8H A IE0........ B ADDR 0088H.3 A IE1........ B ADDR 0088H.1 A INITLCD.... C ADDR 0000H R PUB SEG = CLIBC INT0....... B ADDR 0090H.5 A INT1....... B ADDR 0090H.6 A IT0........ B ADDR 0088H.2 A IT1........ B ADDR 0088H.0 A KP_C1...... B ADDR 00B0H.5 A KP_C2...... B ADDR 00B0H.4 A KP_C3...... B ADDR 00B0H.0 A KP_C4...... B ADDR 00B0H.1 A KP_C5...... B ADDR 00B0H.2 A KP_C6...... B ADDR 00B0H.3 A KP_R1...... B ADDR 0080H.3 A KP_R2...... B ADDR 0080H.2 A KP_R3...... B ADDR 0090H.0 A KP_R4...... B ADDR 0090H.1 A LCD_D4..... B ADDR 00B0H.0 A LCD_D5..... B ADDR 00B0H.1 A LCD_D6..... B ADDR 00B0H.2 A LCD_D7..... B ADDR 00B0H.3 A LCD_EN..... B ADDR 00B0H.6 A LCD_EN2.... B ADDR 00B0H.7 A LCD_RS..... B ADDR 00B0H.5 A LCD_RW..... B ADDR 00B0H.4 A LONGWAIT... C ADDR 00B5H R PUB SEG = CLIBC MAKSTP..... B ADDR 00F8H.2 A MAKSTR..... B ADDR 00F8H.3 A MASTER..... B ADDR 0098H.1 A MASTRQ..... B ADDR 00D8H.6 A MSEC15..... NUMB 1999H A MSEC2...... NUMB 036AH A MSEC4_1.... NUMB 06FFH A MSEC5...... NUMB 0889H A MYSW....... NUMB 000AH A NOT_SPECIAL C ADDR 00A7H R SEG = CLIBC OBUFEND.... NUMB 0020H A OBUFSTART.. NUMB 0017H A OLDCHAR.... NUMB 000BH A OLDTEMP.... NUMB 000CH A ONE_LINE... NUMB 0000H A OV......... B ADDR 00D0H.2 A P.......... B ADDR 00D0H.0 A P0......... D ADDR 0080H A P0_0....... B ADDR 0080H.0 A P0_1....... B ADDR 0080H.1 A P0_2....... B ADDR 0080H.2 A P1......... D ADDR 0090H A P1_0....... B ADDR 0090H.0 A P1_1....... B ADDR 0090H.1 A P1_2....... B ADDR 0090H.2 A P1_3....... B ADDR 0090H.3 A P1_4....... B ADDR 0090H.4 A P1_5....... B ADDR 0090H.5 A P1_6....... B ADDR 0090H.6 A P1_7....... B ADDR 0090H.7 A P3......... D ADDR 00B0H A P3_0....... B ADDR 00B0H.0 A P3_1....... B ADDR 00B0H.1 A P3_2....... B ADDR 00B0H.2 A P3_3....... B ADDR 00B0H.3 A P3_4....... B ADDR 00B0H.4 A P3_5....... B ADDR 00B0H.5 A P3_6....... B ADDR 00B0H.6 A P3_7....... B ADDR 00B0H.7 A PCON....... D ADDR 0087H A PSW........ D ADDR 00D0H A PUTCHAR.... C ADDR ---- EXT PUTLCD..... C ADDR 0068H R PUB SEG = CLIBC PWCM....... D ADDR 008EH A PWENA...... D ADDR 00FEH A PWMP....... D ADDR 008FH A R05........ NUMB 0005H A R06........ NUMB 0006H A R07........ NUMB 0007H A RAW........ NUMB 0000H A RDAT....... B ADDR 0098H.7 A RETPUTLCD.. C ADDR 00AEH R SEG = CLIBC ROW........ NUMB 0003H A ROWS....... NUMB 0001H A RS......... NUMB 0020H A RS0........ B ADDR 00D0H.3 A RS1........ B ADDR 00D0H.4 A RTH........ D ADDR 008DH A RTL........ D ADDR 008BH A RW......... NUMB 0010H A SCL........ B ADDR 0080H.0 A SDA........ B ADDR 0080H.1 A SHIFT...... NUMB 0001H A SLAVEN..... B ADDR 00D8H.7 A SP......... D ADDR 0081H A SRD........ B ADDR 0090H.5 A STP........ B ADDR 0098H.2 A STR........ B ADDR 0098H.3 A SWR........ B ADDR 0090H.7 A T0......... B ADDR 0090H.7 A TCON....... D ADDR 0088H A TF......... B ADDR 0088H.5 A TH......... D ADDR 008CH A TIRUN...... B ADDR 00D8H.4 A TL......... D ADDR 008AH A TR......... B ADDR 0088H.4 A TWO_LINE... NUMB 0008H A USEC100.... NUMB 002CH A USEC40..... NUMB 0011H A XACTV...... B ADDR 00F8H.4 A XDATAS..... B ADDR 00F8H.5 A XSTP....... B ADDR 0098H.0 A XSTPS...... B ADDR 00F8H.0 A XSTR....... B ADDR 0098H.1 A XSTRS...... B ADDR 00F8H.1 A REGISTER BANK(S) USED: 0 ASSEMBLY COMPLETE, NO ERROR FOUND